Recently, many advances have been made in the fabrication of microelectromechanical system (MEMS) structures and devices. However, proper packaging at a reduced cost still remains a pivotal challenge to achieving their overall potential (see, for example, Fritz et. al., “Lead frame packaging of MEMS devices using wafer-level, air-gap structures,” NSTI-Nanotech 2011, 2, 2011, pp. 314-317). For instance, the typical packaging expense of MEMS based products can be as high as 20 to 40 percent of such a products total cost. Thus a cost efficient, integrated circuit (IC) compatible MEMS packaging process would significantly improve the overall potential of MEMS devices.